AMD Buys Taalas: Hardware AI Manages Without the Scarce HBM Memory

cryptonews.ruPublished on 2026-08-09Last updated on 2026-08-09

Abstract

AMD has agreed to acquire Toronto-based startup Taalas, which addresses a major bottleneck in AI inference: the need to constantly transfer a neural network's model weights from memory to the processor for each token generated. Taalas's chips eliminate this operation by embedding the model weights directly into the transistors themselves. This data transfer is what currently limits inference speed and has made high-bandwidth memory (HBM) a critically scarce resource. Taalas, founded in 2023, has developed application-specific integrated circuits (ASICs). Its first test chip, fabricated on TSMC's 6nm process, reportedly ran Meta's Llama 3.1 8B model at speeds 48 times faster than Nvidia GPUs. The architecture features a mask ROM section for permanently stored weights and SRAM for adaptable components. AMD plans to integrate these chips into its Helios racks alongside its Instinct accelerators. However, this approach comes with a significant trade-off: each chip is permanently hardwired for a single model. Switching models requires a partial chip redesign, a process taking about two months even with Taalas's accelerated method. This limits its applicability to stable, widely-used models. The acquisition highlights a broader challenge in the semiconductor industry: the current memory shortage. HBM is sold out through 2026, and DRAM prices have surged. Yet, Taalas's technology demonstrates that this memory bottleneck is an engineering challenge, not an absolute physical limit....

AMD has agreed to acquire Toronto-based startup Taalas, which solves the main problem of neural network inference—the need to constantly pump model weights from memory into the processor to generate each token. Taalas chips manage without this operation: model weights are literally soldered into the transistors. It is this data transfer that limits the speed of modern inference and has turned high-bandwidth memory (HBM) into the most scarce commodity in the semiconductor industry.

The deal will be perceived as another round of rivalry between AMD and Nvidia in the field of inference, but on this front, it changes little. Far more interesting is what the purchase says about the state of the memory market—the most overheated deal in semiconductors right now.

What Taalas Created

Taalas was founded in 2023 by Ljubisa Bajic, who previously founded chip company Tenstorrent, and his wife Lejla Bajic, a veteran of ATI and AMD engineering divisions who took the role of Chief Operating Officer. The company raised $219 million from Fidelity, Quiet Capital, and semiconductor investor Pierre Lamond—the money went towards developing so-called application-specific integrated circuits.

The first test chip, manufactured using TSMC's 6-nanometer process, served Meta's Llama 3.1 8B model at a speed of 16,960 tokens per second. According to the company, this is 48 times faster than Nvidia graphics cards and 8.5 times faster than Cerebras accelerators at the time of comparison. A second-generation chip, designed for models with 20 billion parameters, is expected this year.

The architecture is divided into two zones: an area where model weights are hardwired as mask ROM, and regular SRAM for caches and fine-tuning adapters, which can still be changed. "This rigid firmware is partly what gives us our speed," Bajic told The Next Platform in February.

AMD plans to integrate Taalas chips into Helios racks using a split scheme: Instinct accelerators will process the prompt, and Taalas silicon will generate tokens, all under the control of the ROCm software stack. The company emphasized that this is an acquisition, not a team hire—the deal is expected to close in the fourth quarter. AMD's Senior Vice President of AI, Vamsi Boppana, described the purchase as a platform expansion.

The Compromise Taalas Makes

Soldering weights into silicon has an obvious cost: each chip serves exactly one model—forever. Changing the model requires a partial recalculation of the topology, and even with Taalas's shortened cycle, which involves changing only two metal layers on an almost-finished wafer, this takes about two months on TSMC's production lines. Top-tier models are updated faster. The bet pays off only where the model is stable, widely used, and valuable enough to be frozen.

This same compromise explains why the deal does not change the balance of power in the inference market. Nvidia paid $20 billion for Groq in December—the largest acquisition in its history—to integrate specialized hardware for token generation into the very platform around which the entire industry is already built. The battle for inference is happening at the level of ecosystems and installed software, and a chip tied to a single model participates in neither. What Taalas's approach truly proves is a narrower but more interesting thesis: the memory bottleneck plaguing inference is an engineering solution, not a physical given, and it can be circumvented.

The Memory Question

The market is currently pricing in the assumption that this memory shortage is permanent. Prices for regular DRAM rose by almost 90% in the first quarter. High-bandwidth memory (HBM) is essentially sold out for all of 2026, and the HBM market volume this year is expected to reach $54.6 billion. SK hynix, which controls more than half of HBM supply, surpassed a $1 trillion market capitalization and announced the construction of new factories worth $38.1 billion. For the average investor, the entire memory bet rests on one assumption: AI demand will keep memory in shortage for years to come.

This assumption is already under attack from several sides. Taalas completely removes memory for weights from the model-serving process, while Nvidia engineers compress and quantize models precisely to reduce the memory footprint of a deployed model.

Memory manufacturers themselves are working in the same direction. Samsung's zHBM technology, showcased at the FMS conference last week, stacks memory directly on the accelerator, multiplying effective bandwidth. SK hynix and Sandisk just published the first standard for high-speed flash memory aimed at replacing cheap NAND for the work HBM performs today. Virtually every major industry player is funding its own way to reduce the need for the very resource the market believes will be scarce forever.

AMD bought proof that inference can work without accessing the component whose shortage defines the entire current AI demand cycle—and will sell this proof inside racks that still contain GPUs and HBM. Investors who view today's memory prices as a permanent feature of the entire AI infrastructure build-out cycle are betting against a massive and growing engineering movement aimed at the opposite result.

Memory has always been a cyclical business. Those paying today's prices for it have just financed another reason why it will remain so.

AI Opinion

From the perspective of machine data analysis, the key precedent for Taalas chips can be found not in the world of AI, but in the crypto industry. Specialized integrated circuits for Bitcoin mining solve a similar problem—soldering the algorithm into silicon for speed—and get the same side effect: complete inflexibility. Hash Telegraph has already described how hardware specialization, taken to the extreme, creates the risk of obsolescence when the base algorithm changes or a new computational paradigm emerges.

Technical aspects the article does not detail concern idle-time economics: while a Taalas chip serves one model, competing labs release new versions every few months, and the topology re-flashing cycle takes about two months on TSMC's lines. ASIC history shows that specialization pays off only on a stable algorithm—the question is whether the architecture of large language models will prove stable enough for this bet.

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Related Questions

QWhat is the core technological innovation of Taalas' chips that addresses a major bottleneck in AI inference?

AThe core innovation is the use of 'model-specific integrated circuits' where the weights of an AI model are permanently etched (or 'hard-wired') into the transistors of the chip as mask ROM. This eliminates the need to constantly transfer model weights from separate high-bandwidth memory (HBM) to the processor for generating each token, which is the primary speed limitation in current inference systems.

QAccording to the article, what is the main compromise or trade-off associated with Taalas's approach?

AThe main compromise is a complete lack of flexibility: each chip is permanently dedicated to a single, specific AI model. Switching to a different model requires a partial redesign and fabrication of the chip's metal layers, a process that takes about two months. This approach is only economically viable for models that are stable, widely used, and valuable enough to 'freeze' in hardware.

QWhy does the article suggest AMD's acquisition of Taalas does not significantly change the competitive landscape against Nvidia in AI inference?

AThe competition in AI inference is fought at the level of software ecosystems and installed base, not just hardware. Nvidia's ecosystem (CUDA, etc.) is deeply entrenched. A chip like Taalas's, which is tied to a single model, cannot participate in or challenge these broader platform dynamics. The article contrasts this with Nvidia's acquisition of Groq, which aimed to integrate specialized token generation hardware into its existing, dominant platform.

QWhat broader market assumption about AI infrastructure is being challenged by technologies like Taalas's, according to the article?

AThe article challenges the market assumption that the current shortage and high demand for High-Bandwidth Memory (HBM) is a permanent, defining feature of the AI build-out cycle. Technologies like Taalas's (which removes weight memory entirely), model compression by Nvidia, and new memory architectures (like Samsung's zHBM) are all engineering efforts aimed at reducing dependence on HBM, suggesting the memory shortage is an engineering problem, not a physical inevitability.

QWhat historical precedent from the cryptocurrency industry does the article's 'AI Opinion' section draw for Taalas's chips?

AThe 'AI Opinion' section draws a parallel to Bitcoin mining ASICs (Application-Specific Integrated Circuits). Like Taalas's chips, mining ASICs hard-wire a specific algorithm (e.g., SHA-256) into silicon for extreme speed and efficiency, resulting in the same side effect of complete inflexibility. The risk is that the hardware becomes obsolete if the base algorithm changes or a new computational paradigm emerges, raising the question of whether large language model architectures will be stable enough for such a specialized hardware bet.

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