How Difficult is Chip Making? A Division Error Costs 475 Million Dollars

marsbitPublished on 2026-06-15Last updated on 2026-06-15

Abstract

How Hard Is It to Make a Chip? A Division Error Cost $475 Million Chip expert Shi Kan, a researcher at the Chinese Academy of Sciences and a popular tech creator, explains the immense challenges of chip development. Chips are foundational to modern technology, but their creation is extraordinarily difficult. The journey from sand to a functional chip involves complex design and manufacturing, but a critical bottleneck is verification—ensuring the design works flawlessly before costly production. A single, undetected bug can have catastrophic consequences, as illustrated by the infamous 1994 Intel Pentium FDIV bug. A flaw in the floating-point division unit forced a recall costing $475 million. Unlike software, chips cannot be easily patched after manufacture, making "first-time success" paramount. However, industry surveys show only 24% of chip projects achieve this; over three-quarters require at least one costly re-spin due to design flaws. Verification has thus become the dominant phase, consuming up to 70% of the design cycle. The core challenge is a "verification impossible triangle" between high performance, good debuggability, and low cost. Exhaustively verifying a modern CPU core could take 15,000 years with software simulation, or 30 years with advanced hardware emulation—timeframes utterly impractical for development. Despite being essential, verification is often seen as unglamorous "dirty work," receiving less academic attention than fields like AI. Shi and hi...

Hello everyone, I'm Shi Kan from the Institute of Computing Technology at the Chinese Academy of Sciences, a 'slash technology worker'. I have over a decade of experience in the chip industry, and currently, I conduct academic research related to chips at the Chinese Academy of Sciences; at the same time, I am also a science and technology Bilibili UP host 'Lao Shi Tan Xin', and my viewers call me 'Lao Shi'.

Chips: The Cornerstone of Modern Society

When it comes to chips, everyone surely knows their importance.

Whether it's the currently hot artificial intelligence, life sciences and medicine, autonomous driving, network communications, and so on, almost all the technologies of modern society you can imagine are inseparable from chips—this foundational technology of the information age.

I have been involved in chip work for a long time, and the chip development process is actually a very interesting one, mainly due to two aspects.

Firstly, the applications of chips are extremely wide-ranging. Once you enter this industry, you probably don't have to worry about unemployment because many industries require chip technology.

The second reason might be more important: chip development is a very difficult endeavor. As chip engineers, we need to constantly learn and enrich ourselves to face and embrace this era full of opportunities and challenges.

So the question arises: what exactly makes chip technology so difficult?

Why Are Chips So Difficult?

Completed: 10%//////////

Everyone might know that the manufacturing process of a chip is essentially an evolution journey of a grain of sand. Sand might be something inexhaustible and abundant on this planet; but turning low-value sand into high-value chips adds up to nothing but human intelligence.

Starting from sand, we need to purify it to obtain wafers. Then, through a series of steps such as photolithography, ion implantation, etching, packaging, and so on, the abundant, inexhaustible sand is transformed into the final tiny chip.

So, having said all that, with so many steps, chip manufacturing is actually only part of the entire chip development process; it does not equal chip development itself.

There is another crucial step, which is chip design. It refers to completing the circuit design according to requirements and making the circuit function properly. Then, we hand over the designed circuit to chip manufacturers for the later stages of manufacturing, ultimately obtaining the physical chip.

But there is another question here: how do you ensure that the chip's functionality matches your initial design?

There is an interesting little story here. In 1947, a very famous female programmer named Grace Hopper found her computer wasn't working. After careful investigation and exploration, she discovered that a moth had flown into a relay of the computer. So, she carefully used tweezers to remove this moth and taped it onto a piece of paper.

This might be the first 'bug' discovered in the entire history of computer development, meaning a vulnerability.

If the previous example seems too distant, we actually have more examples. Here's a math problem for everyone: What is the final result of this expression? Actually, this problem is simple because the numerator and denominator in the later part are the same and can cancel out; then the numbers before and after the minus sign are also the same, so subtracting the same number should result in 0. However, in actual computers and chips, the result might not be this.

For example, in an Intel Pentium chip, the result was 255.00000000. What happened? It turned out that when an American scientist was conducting scientific research, he kept getting incorrect calculations when running this expression. Finally, he discovered that there was an undetected design flaw in a floating-point division unit of this chip.

Don't underestimate this design flaw; its consequences were actually very serious. In the 1990s, Intel spent $475 million to recall all problematic Pentium chips worldwide.

So, returning to the earlier question: what exactly makes chip technology so difficult?

In my view, the difficulty of chips lies in the need to succeed on the first try. Making chips is not like software, where you can patch and fix various problems later. In contrast, once a chip completes the evolution journey from sand to chip, you may have already spent tens of thousands, millions, or even hundreds of millions to complete the tape-out and manufacturing, making it very difficult to modify afterwards.

Then, the next question is: how many chip projects today can achieve success on the first try?

The 'Bottleneck' of Chip Verification

Completed: 40%//////////

According to survey data, only 24% of chip projects can achieve success on the first try. That is to say, 3/4 of chip projects, due to various major and minor undetected design flaws, require at least one more tape-out, which consumes a lot of time and money.

Therefore, the key question is: how can we ensure, as much as possible, that chips have as few or no bugs/design flaws as possible before tape-out and manufacturing? This is the direction I have been dedicated to researching over the past few years.

Also according to this research data, throughout the entire chip development process, especially with the current development of AI and various high-tech fields, chips are becoming increasingly complex. As a result, chip verification has become a very high proportion of the entire chip development cycle, even exceeding half, reaching 70% of the entire chip design cycle.

But unfortunately, chip verification is also a difficult task. I list some astronomical numbers here, such as the Earth's circumference, the possible number of stars in the Milky Way, or the length of a light-year.

In chip verification, there is also an astronomical number, which is the number of cycles needed to fully verify a CPU core. What exactly does this astronomical number represent?

If we use the most advanced software simulation technology available today to fully verify a CPU core, it would take at least 15,000 years. Using the most advanced hardware emulation technology can slightly reduce this time to 30 years. But we all know that developing a chip cannot wait 15,000 years, nor can it wait 30 years.

So, what is the essence of the problem? We have actually been researching this over the past few years. We found that in chip verification, there exists a so-called 'impossible triangle', namely the high performance of chip verification, good debugging capability, and low cost; these three factors crucial to chip verification cannot be satisfied simultaneously. For current mainstream research or methods, at most, two out of the three can be achieved, and this is the fundamental reason for the low efficiency of chip verification.

Someone Must Do Something Different

Completed: 60%//////////

Due to these reasons, chip verification has not seen significant development over the past period.

In chip companies, chip engineers may spend more time writing test cases and running regression verification. Essentially, it's dirty and tiring work. The same goes for academia; very few scholars are devoted to chip verification research, especially compared to current hot fields like artificial intelligence, research related to chip verification is very scarce.

So, an academic leader once told me that in the same amount of time, they could publish three or even more papers in the field of artificial intelligence, but in chip verification, they might not even publish one.

Unfortunately, what they said is true.

However, someone must do something different.

Therefore, over the past few years, I have led a team in conducting research related to chip verification and have built an agile verification research system from scratch. The core of this research system is a verification platform called ENCORE, which is based on a special chip—the Field-Programmable Gate Array (FPGA). ENCORE can significantly improve verification efficiency while achieving good verification debuggability.

To build this agile verification research system, on one hand, we need to continuously optimize the efficiency of vulnerability mining, debugging, and repair at the algorithmic level; on the other hand, we also hope to build an end-to-end agile verification acceleration platform based on programmable logic chips (FPGAs). At the application level, we hope this platform can be suitable for both general-purpose processor verification, such as CPUs or GPUs, and specialized chip verification, such as the currently very popular AI accelerators.

Over the past period, we have done a lot of cutting-edge exploratory work in this field, including the aforementioned ENCORE and many new research projects. We have also published these research results at many internationally renowned academic conferences.

We are actually working on some interesting projects afterwards, but since these works have not been published yet, I won't show them to you one by one for now.

Letting More People Understand Chips

Completed: 80%//////////

However, during the research process, I gradually realized that these scientific or academic achievements are mainly for people within our small circle who only understand chip verification and related fields. So, how can we let more people see our work, understand our research, and even participate in our endeavors?

Naturally, I thought of chip science popularization, which also feels very interesting to me. I have been engaged in science popularization for four or five years, starting from text initially to later making videos on Bilibili. Chip science popularization has not only brought me many gains but also helped me meet many like-minded friends, as well as viewers who like and support me.

However, making chip science popularization videos is not a simple task, especially in today's era of short video proliferation. A fellow science popularization blogger and leader told me that in the same amount of time it takes me to produce one long, hardcore chip science popularization video, they could make 10 or even more short videos related to hot topics, and the traffic could be many times greater than mine.

Unfortunately, what they said is also true.

But based on this, I think there still needs to be people who persist in doing difficult things. I hope to combine chip science popularization and chip verification—two equally difficult but equally interesting things—and use video and text formats to show everyone what we have done, the papers we have published, and the open-source chip projects our entire large team is researching.

Besides chips, I will also share hardcore technologies like artificial intelligence and computers with everyone, as well as share my growth experiences, the books I have read, and the knowledge I have acquired. I know that I am not a genius myself, nor am I a so-called all-around expert or guru. I would rather be a 'guide' for everyone, sharing the path I have walked.

So, returning to the question I wanted to share with everyone today: chip research and chip science popularization, which one is more interesting? Of course, for me, both are equally interesting. The reason is simple: because they are equally difficult. At the same time, they both require me to persist very long-term and enduringly.

Many people say we need to do difficult and right things. But the problem actually is: how do you judge if something is right before you do it? If something is seen as sitting on a cold bench in others' eyes, or seen as doing dirty, tiring work, would you still persist in doing it?

Therefore, I prefer to do difficult and long-term things, such as academic research in chip verification, or making long hardcore chip science popularization videos. Because if something is difficult and requires long-term persistence, then it is probably right.

That's all I wanted to share with you today. I am Lao Shi, thank you, everyone!

This article comes from the WeChat public account: Gezhi Lundaotan , Author: Shi Kan, Original Title: 'How Difficult is Chip Making? A Division Error Costs 475 Million Dollars | Shi Kan'

Trending Cryptos

Related Questions

QWhat was the main point of the story about the Intel Pentium chip flaw mentioned in the article?

AThe story illustrated a critical design bug in the Pentium chip's floating-point division unit. A calculation that should have resulted in '0' instead produced '255.00000000'. This seemingly minor error forced Intel to spend $475 million on a global recall of the faulty chips in the 1990s, highlighting the high cost of failure in chip development.

QAccording to the article, why is chip development so difficult, especially compared to software development?

AChip development is exceptionally difficult because it requires 'first-time success'. Unlike software, which can be patched and updated after release, a physical chip cannot be easily modified once manufactured (or 'taped out'). The entire expensive process, from sand to finished silicon, costing potentially hundreds of millions, must be redone to fix design flaws.

QWhat percentage of chip projects achieve first-time success according to the survey data cited by the author?

AAccording to the survey data presented by the author, only 24% of chip projects achieve first-time success. This means approximately three-quarters (76%) of projects require at least one re-spin or re-fabrication due to various undetected design bugs, leading to significant extra time and cost.

QWhat is the 'impossible triangle' in chip verification, as explained in the article?

AIn chip verification, the 'impossible triangle' refers to the three crucial factors—high performance, good debuggability, and low cost. The article states that these three factors cannot be satisfied simultaneously with current mainstream methods. Engineers and researchers can only achieve a maximum of two out of these three, which fundamentally limits verification efficiency.

QWhat are the two 'hard but long-term' pursuits that the author, Shi Kan ('Lao Shi'), is committed to?

AThe author is committed to two challenging, long-term endeavors. First, he leads academic research in chip verification, specifically developing an agile verification framework called ENCORE based on FPGAs. Second, he creates hardcore, long-form chip and technology popular science content (like his Bilibili channel videos), aiming to make complex topics accessible to a wider audience beyond academic circles.

Related Reads

Full Debut Q&A! Fed Chair Wash: Firmly Adhering to 2% Inflation Target, Establishing Five Special Task Forces, Personally Did Not Submit Dot Plot

Federal Reserve Chair Kevin Warsh delivered his first FOMC press conference, maintaining the federal funds rate at 3.5%-3.75% and emphasizing the Committee's unanimous and explicit commitment to achieving its 2% inflation target. Key announcements included significant changes to Fed communication and operations. The policy statement was significantly shortened and, notably, forward guidance was removed. Chair Warsh broke from precedent by declining to submit his own economic forecasts and "dot plot." He announced the immediate formation of five special working groups focusing on: Fed communication, the balance sheet, data sources, productivity and employment (including AI's impact), and the inflation framework. These groups, which will include external experts, are tasked with recommending improvements by year-end. One key group will review the Fed's $6.7 trillion balance sheet to assess the roles of interest rates versus balance sheet tools in monetary policy. Warsh characterized the current restrictive stance of policy as "uneven," noting its effect on housing but questioning its impact on financial markets where conditions appear less restrictive. He expressed a desire to move away from a "Fed-speak" driven market, arguing that markets should react to economic data rather than Fed commentary to provide better informational signals. On inflation, he stated there is no need to reconsider the 2% target until the Fed re-establishes its commitment and capability to achieve it. Economic projections (SEP) from other officials showed a split on the rate outlook for 2024, with half expecting at least one hike and half forecasting unchanged or lower rates. The median projection saw the federal funds rate at 3.8% by year-end 2024. Following the announcements, risk assets sold off sharply, Treasury yields rose, and the dollar strengthened.

marsbit19m ago

Full Debut Q&A! Fed Chair Wash: Firmly Adhering to 2% Inflation Target, Establishing Five Special Task Forces, Personally Did Not Submit Dot Plot

marsbit19m ago

Full First Q&A! Fed Chair Warsh: Sticks to 2% Inflation Target, Establishes Five Special Working Groups, Personally Did Not Submit Dot Plot

The Federal Reserve, under new Chair Kevin Warsh, held its first FOMC meeting, maintaining the federal funds rate target range at 3.5% to 3.75%. The central bank issued a significantly shortened policy statement, explicitly removing forward guidance. Chair Warsh delivered a strong, unified commitment to achieving the 2% inflation target, stating the FOMC has the "capability and the commitment" to restore price stability and sees no need to review the target itself at this time. Warsh announced the immediate formation of five special working groups to examine and propose improvements in key areas by year-end: Fed communication, the balance sheet (including a review of the $6.7 trillion portfolio and its role in policy), data sources and methodology, productivity and employment (including AI's impact), and the inflation framework. In a break from tradition, Chair Warsh did not submit his own economic projections or "dot plot." The submitted Summary of Economic Projections (SEP) showed a split among other officials: half anticipate at least one rate hike this year, while half expect rates to remain steady or fall. The median projection sees the federal funds rate at 3.8% by year-end 2026. Warsh characterized the current policy stance as "uneven," noting restrictive effects in sectors like housing but less so in financial markets. He emphasized a desire to move away from a market dynamic overly focused on Fed signaling, advocating for markets to react more to economic data. On AI, he called it potentially the most significant economic change in his adult life, driving clear demand but with uncertain timing and scale on the supply side, creating a "race" between the two.

链捕手22m ago

Full First Q&A! Fed Chair Warsh: Sticks to 2% Inflation Target, Establishes Five Special Working Groups, Personally Did Not Submit Dot Plot

链捕手22m ago

The DeepSeek Financing Story

DeepSeek's financing round, totaling approximately 3 billion USD, concluded recently, revealing details about the process and key investors. The round was initiated around April with strict initial terms: a minimum commitment of 5 billion RMB, no syndication, and a pure RMB structure. These were later relaxed, with the minimum ticket size reduced to 1.5 billion RMB. A pivotal four-hour online investor meeting in mid-May served as the primary interaction for many backers with DeepSeek's founder, Liang Wenfeng. Despite not being a naturally eloquent speaker, Liang's philosophy deeply resonated. He consistently emphasized the company's singular focus on AGI (Artificial General Intelligence), the principle of "less is more," extreme caution in spending, and the paramount importance of team stability. His notable quotes included describing the team as "ordinary people doing extraordinary things" and stating that "AGI is a big enough thing; everything else is just process." The final investor list featured 10 entities, but underlying fund structures indicate participation from nearly 100 institutions and individuals. Notable lead investors include Monolith Capital (increasing its commitment from 1.5 to 3 billion RMB), Zhenxingu Capital, IDG Capital, and state-affiliated investors like Guozhitou. Conspicuously absent were major firms like Sequoia China and Hillhouse Capital, despite earlier speculation about their involvement. A core condition set by Liang Wenfeng for all investors, whether corporate or venture capital, was a strict prohibition against poaching DeepSeek employees or encouraging them to leave to start ventures. The financing process highlighted DeepSeek's unexpected openness to external capital, surprising many in the investment community. The company's low-profile nature, combined with its ambitious AGI vision and principled approach, fostered a sense of reverence among participating investors, many of whom were reluctant to discuss the deal publicly, preferring to maintain its discreet and purposeful ethos.

链捕手29m ago

The DeepSeek Financing Story

链捕手29m ago

The DeepSeek Fundraising Story

"The DeepSeek Funding Story: Insights from the $2.15 Billion Round" This article details behind-the-scenes narratives from DeepSeek's recent massive funding round. Key highlights include the legendary four-hour online investor meeting where CEO Liang Wenfeng, despite not being a charismatic speaker, impressed attendees with his focus on AGI and team stability. He emphasized the philosophy of "ordinary people doing extraordinary things" and a steadfast commitment to solely advancing intelligence. The fundraising process, initiated in April, saw initial demands for a minimum investment of 5 billion RMB, no syndication, and a pure RMB structure. These terms were later adjusted to a 1.5 billion RMB minimum to accommodate more investors. A notable absence was the lack of participation from major VC firms Sequoia China and Hillhouse Capital, despite early rumors, making IDG the only established VC in the final lineup. The investor list, while showing 10 entities, actually involved nearly 100 underlying institutions and individuals upon closer examination. Significant participants included Monolith Capital, which doubled its commitment to 3 billion RMB, and Zhenxingu Capital, an unexpected entrant. Liang Wenfeng's paramount condition for all investors was a strict agreement not to poach DeepSeek employees. The article reflects on DeepSeek's unexpected openness to funding and the mix of strategies—synergy, insight, brand alignment, and persistence—that secured investors a stake. The overarching sentiment among participants is one of pride and a shared belief in DeepSeek's potential to become a landmark Chinese company, driven by a profound sense of purpose in the AGI race.

marsbit31m ago

The DeepSeek Fundraising Story

marsbit31m ago

DAT Companies Take on Side Businesses

The article details the strategic shifts of Digital Asset Treasury (DAT) companies amid a prolonged market downturn. Initially popularized by firms like MicroStrategy, the DAT model—where companies hold cryptocurrencies on their balance sheets—has faced significant pressure as crypto ETFs eroded their investment thesis and bear markets strained finances. Key players are adapting in several ways. Some, like ETHzilla, have abandoned the model entirely. Others are pivoting towards becoming active, revenue-generating participants in the crypto ecosystem rather than passive holders. This evolution is taking two main paths: 1. **Transformation into Institutional Crypto Asset Managers:** Companies like SharpLink Gaming and GameSquare are leveraging their holdings to generate yield, moving beyond simple storage. They employ strategies like 100% ETH staking or using machine learning to optimize DeFi yields, positioning themselves as platforms offering institutional-grade crypto yield products. 2. **Becoming Blockchain Infrastructure Operators:** This is prominent in the Solana ecosystem. Firms like DeFi Development and SOL Strategies are acquiring validator businesses, issuing liquid staking tokens (e.g., dfdvSOL, fwdSOL), and integrating them into DeFi protocols. They generate fee-based revenue from these operations, building network effects. The article notes that successful转型 hinges on building operational expertise and defensible business models around crypto assets, such as technical advantages or deep ecosystem integration. However, these new paths carry risks like smart contract vulnerabilities or ecosystem dependence. Ultimately, this collective shift signals a maturation phase for the DAT movement. It highlights that in crypto, sustainable value is increasingly tied to active participation, cash flow generation, and providing real utility, rather than speculative capital allocation alone.

Foresight News34m ago

DAT Companies Take on Side Businesses

Foresight News34m ago

Trading

Spot
Futures

Hot Articles

How to Buy CHIP

Welcome to HTX.com! We've made purchasing USD.AI (CHIP) simple and convenient. Follow our step-by-step guide to embark on your crypto journey.Step 1: Create Your HTX AccountUse your email or phone number to sign up for a free account on HTX. Experience a hassle-free registration journey and unlock all features.Get My AccountStep 2: Go to Buy Crypto and Choose Your Payment MethodCredit/Debit Card: Use your Visa or Mastercard to buy USD.AI (CHIP) instantly.Balance: Use funds from your HTX account balance to trade seamlessly.Third Parties: We've added popular payment methods such as Google Pay and Apple Pay to enhance convenience.P2P: Trade directly with other users on HTX.Over-the-Counter (OTC): We offer tailor-made services and competitive exchange rates for traders.Step 3: Store Your USD.AI (CHIP)After purchasing your USD.AI (CHIP), store it in your HTX account. Alternatively, you can send it elsewhere via blockchain transfer or use it to trade other cryptocurrencies.Step 4: Trade USD.AI (CHIP)Easily trade USD.AI (CHIP) on HTX's spot market. Simply access your account, select your trading pair, execute your trades, and monitor in real-time. We offer a user-friendly experience for both beginners and seasoned traders.

1.7k Total ViewsPublished 2026.04.21Updated 2026.06.02

How to Buy CHIP

Discussions

Welcome to the HTX Community. Here, you can stay informed about the latest platform developments and gain access to professional market insights. Users' opinions on the price of CHIP (CHIP) are presented below.

活动图片