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On June 5th, South Korea's stock market experienced a sharp decline, with major chipmakers like Samsung and SK Hynix dropping nearly 10%. Amidst the turmoil, NVIDIA CEO Jensen Huang's visit to Seoul played a dramatic role in boosting market sentiment. Following a dinner meeting with SK Group Chairman Chey Tae-won and SK Hynix CEO Kwak Noh-Jung, Huang confirmed that NVIDIA's new Vera CPU will utilize SK Hynix DRAM. The companies announced a multi-year technical partnership to co-develop next-generation memory for NVIDIA's AI infrastructure, covering products from data centers to personal AI and robotics. This collaboration extends beyond memory supply. SK Hynix is integrating NVIDIA's AI and Omniverse platform into its own semiconductor design and manufacturing processes, including computational lithography and creating digital twins of its fabrication plants for autonomous operation. While strengthening ties with SK Hynix, NVIDIA is diversifying its supply chain for the upcoming HBM4 memory, with Samsung, SK Hynix, and Micron all certified as suppliers for its Vera Rubin platform. Despite this, Huang warned that the global chip shortage, driven by relentless demand from AI factory construction, is expected to persist for several years across the entire supply chain. His visit underscores NVIDIA's systematic effort to deepen integration with South Korea's broader tech industry.

Amidst Nvidia's dominance in the AI chip market, Broadcom and AMD are key contenders for the second-place spot. AMD competes directly in general-purpose GPUs, gaining some traction with clients like Meta but facing significant challenges overcoming Nvidia's entrenched CUDA software ecosystem. In contrast, Broadcom pursues a differentiated strategy by designing custom XPU chips tailored to specific AI workloads for major clients like Anthropic, Google, Meta, and OpenAI. This approach offers efficiency advantages and greater customer stickiness, particularly as AI compute shifts from training to inference. Despite a recent stock sell-off following a Q2 revenue guidance miss, Broadcom's CEO reaffirmed the long-term target of $100 billion in annual AI chip revenue by fiscal 2027. With Q2 AI revenue at $10.8 billion, significant growth potential remains as its custom chip projects ramp up. While Broadcom trades at a higher valuation multiple than AMD, analysts argue this premium is justified given its superior competitive positioning and expected faster growth trajectory, making it the more compelling investment choice following its recent pullback.

Microsoft announces plans to build a commercially viable quantum computer by 2029, a significant acceleration from the previous industry consensus of a decade. The breakthrough is fueled by their new Majorana 2 quantum chip, which boasts a record-breaking average qubit lifetime of 20 seconds—a 1,000-fold reliability improvement over its predecessor. This leap was achieved by leveraging topological qubits, a theoretically more stable technology using Majorana zero modes, and switching the core superconducting material from aluminum to lead. Crucially, Microsoft's "Discovery" agentic AI platform accelerated the R&D process. AI agents autonomously analyzed vast experimental data, optimized manufacturing parameters (like the lead alloy composition), and solved issues like "ghost noise," dramatically speeding up experimentation. While the 20-second coherence time is a landmark, challenges remain: scaling from 12 qubits to the millions needed for practical applications, managing compilation costs, and verifying quantum results. Skeptics call for peer-reviewed data, and questions persist about whether even 20 seconds is sufficient for complex algorithms like breaking RSA encryption. The race is on with other approaches (superconducting, trapped ions), but Microsoft's confidence in its topological roadmap signals a potential shortcut to a scalable quantum future.

SemiAnalysis has published a detailed teardown report on the HiSilicon Kirin 9030 Pro chipset found in Huawei's Mate 80 Pro. Fabricated using SMIC's most advanced N+3 node without EUV lithography, the analysis reveals significant technical achievements and strategic shifts. The report indicates SMIC's N+3 has achieved transistor density comparable to TSMC's N6 (113.4 vs 107.7 MTr/mm²), primarily through aggressive use of Self-Aligned Quadruple Patterning (SAQP) for its metal layers. This results in a notably small 32.5nm M0 metal pitch. However, SemiAnalysis notes this achievement comes with significantly higher process complexity, cost, and potential yield challenges compared to competitors using more advanced tools. The Kirin 9030 design maximizes this constrained density. While its GPU performance has improved ~70% and matches Qualcomm's 2022 flagship level, the CPU core's IPC lags behind current top-tier designs from Apple and Qualcomm, a gap attributed to the underlying manufacturing technology rather than design capability. Facing long-term restrictions on advanced tools, Huawei is charting a new path. The report highlights the company's "LogicFolding" roadmap, a 3D stacking technique aimed at shortening signal paths to boost performance and efficiency. The goal is to reach 5GHz frequency and a projected density of 295 MTr/mm² by 2031. SemiAnalysis concludes that export controls have not halted China's chip progress but have fundamentally altered its trajectory, making it more expensive and complex. This has spurred innovation in alternative areas like 3D stacking and domestic EDA tool development, with Huawei's supply chain also beginning to integrate Chinese memory from CXMT.

How Hard Is It to Make a Chip? A Division Error Cost $475 Million Chip expert Shi Kan, a researcher at the Chinese Academy of Sciences and a popular tech creator, explains the immense challenges of chip development. Chips are foundational to modern technology, but their creation is extraordinarily difficult. The journey from sand to a functional chip involves complex design and manufacturing, but a critical bottleneck is verification—ensuring the design works flawlessly before costly production. A single, undetected bug can have catastrophic consequences, as illustrated by the infamous 1994 Intel Pentium FDIV bug. A flaw in the floating-point division unit forced a recall costing $475 million. Unlike software, chips cannot be easily patched after manufacture, making "first-time success" paramount. However, industry surveys show only 24% of chip projects achieve this; over three-quarters require at least one costly re-spin due to design flaws. Verification has thus become the dominant phase, consuming up to 70% of the design cycle. The core challenge is a "verification impossible triangle" between high performance, good debuggability, and low cost. Exhaustively verifying a modern CPU core could take 15,000 years with software simulation, or 30 years with advanced hardware emulation—timeframes utterly impractical for development. Despite being essential, verification is often seen as unglamorous "dirty work," receiving less academic attention than fields like AI. Shi and his team are tackling this by developing an agile verification research framework called ENCORE, based on FPGA technology, to improve verification efficiency and debug capability. Beyond research, Shi engages in public science communication through long-form video content, aiming to demystify chip technology, AI, and computer science. He argues for the value of pursuing "hard and long-term" endeavors, whether in the meticulous world of chip verification or in creating substantive educational content, believing such sustained effort is likely the right path forward.