How Difficult is Chip Making? A Division Error Costs 475 Million Dollars

marsbitPubblicato 2026-06-15Pubblicato ultima volta 2026-06-15

Introduzione

How Hard Is It to Make a Chip? A Division Error Cost $475 Million Chip expert Shi Kan, a researcher at the Chinese Academy of Sciences and a popular tech creator, explains the immense challenges of chip development. Chips are foundational to modern technology, but their creation is extraordinarily difficult. The journey from sand to a functional chip involves complex design and manufacturing, but a critical bottleneck is verification—ensuring the design works flawlessly before costly production. A single, undetected bug can have catastrophic consequences, as illustrated by the infamous 1994 Intel Pentium FDIV bug. A flaw in the floating-point division unit forced a recall costing $475 million. Unlike software, chips cannot be easily patched after manufacture, making "first-time success" paramount. However, industry surveys show only 24% of chip projects achieve this; over three-quarters require at least one costly re-spin due to design flaws. Verification has thus become the dominant phase, consuming up to 70% of the design cycle. The core challenge is a "verification impossible triangle" between high performance, good debuggability, and low cost. Exhaustively verifying a modern CPU core could take 15,000 years with software simulation, or 30 years with advanced hardware emulation—timeframes utterly impractical for development. Despite being essential, verification is often seen as unglamorous "dirty work," receiving less academic attention than fields like AI. Shi and hi...

Hello everyone, I'm Shi Kan from the Institute of Computing Technology at the Chinese Academy of Sciences, a 'slash technology worker'. I have over a decade of experience in the chip industry, and currently, I conduct academic research related to chips at the Chinese Academy of Sciences; at the same time, I am also a science and technology Bilibili UP host 'Lao Shi Tan Xin', and my viewers call me 'Lao Shi'.

Chips: The Cornerstone of Modern Society

When it comes to chips, everyone surely knows their importance.

Whether it's the currently hot artificial intelligence, life sciences and medicine, autonomous driving, network communications, and so on, almost all the technologies of modern society you can imagine are inseparable from chips—this foundational technology of the information age.

I have been involved in chip work for a long time, and the chip development process is actually a very interesting one, mainly due to two aspects.

Firstly, the applications of chips are extremely wide-ranging. Once you enter this industry, you probably don't have to worry about unemployment because many industries require chip technology.

The second reason might be more important: chip development is a very difficult endeavor. As chip engineers, we need to constantly learn and enrich ourselves to face and embrace this era full of opportunities and challenges.

So the question arises: what exactly makes chip technology so difficult?

Why Are Chips So Difficult?

Completed: 10%//////////

Everyone might know that the manufacturing process of a chip is essentially an evolution journey of a grain of sand. Sand might be something inexhaustible and abundant on this planet; but turning low-value sand into high-value chips adds up to nothing but human intelligence.

Starting from sand, we need to purify it to obtain wafers. Then, through a series of steps such as photolithography, ion implantation, etching, packaging, and so on, the abundant, inexhaustible sand is transformed into the final tiny chip.

So, having said all that, with so many steps, chip manufacturing is actually only part of the entire chip development process; it does not equal chip development itself.

There is another crucial step, which is chip design. It refers to completing the circuit design according to requirements and making the circuit function properly. Then, we hand over the designed circuit to chip manufacturers for the later stages of manufacturing, ultimately obtaining the physical chip.

But there is another question here: how do you ensure that the chip's functionality matches your initial design?

There is an interesting little story here. In 1947, a very famous female programmer named Grace Hopper found her computer wasn't working. After careful investigation and exploration, she discovered that a moth had flown into a relay of the computer. So, she carefully used tweezers to remove this moth and taped it onto a piece of paper.

This might be the first 'bug' discovered in the entire history of computer development, meaning a vulnerability.

If the previous example seems too distant, we actually have more examples. Here's a math problem for everyone: What is the final result of this expression? Actually, this problem is simple because the numerator and denominator in the later part are the same and can cancel out; then the numbers before and after the minus sign are also the same, so subtracting the same number should result in 0. However, in actual computers and chips, the result might not be this.

For example, in an Intel Pentium chip, the result was 255.00000000. What happened? It turned out that when an American scientist was conducting scientific research, he kept getting incorrect calculations when running this expression. Finally, he discovered that there was an undetected design flaw in a floating-point division unit of this chip.

Don't underestimate this design flaw; its consequences were actually very serious. In the 1990s, Intel spent $475 million to recall all problematic Pentium chips worldwide.

So, returning to the earlier question: what exactly makes chip technology so difficult?

In my view, the difficulty of chips lies in the need to succeed on the first try. Making chips is not like software, where you can patch and fix various problems later. In contrast, once a chip completes the evolution journey from sand to chip, you may have already spent tens of thousands, millions, or even hundreds of millions to complete the tape-out and manufacturing, making it very difficult to modify afterwards.

Then, the next question is: how many chip projects today can achieve success on the first try?

The 'Bottleneck' of Chip Verification

Completed: 40%//////////

According to survey data, only 24% of chip projects can achieve success on the first try. That is to say, 3/4 of chip projects, due to various major and minor undetected design flaws, require at least one more tape-out, which consumes a lot of time and money.

Therefore, the key question is: how can we ensure, as much as possible, that chips have as few or no bugs/design flaws as possible before tape-out and manufacturing? This is the direction I have been dedicated to researching over the past few years.

Also according to this research data, throughout the entire chip development process, especially with the current development of AI and various high-tech fields, chips are becoming increasingly complex. As a result, chip verification has become a very high proportion of the entire chip development cycle, even exceeding half, reaching 70% of the entire chip design cycle.

But unfortunately, chip verification is also a difficult task. I list some astronomical numbers here, such as the Earth's circumference, the possible number of stars in the Milky Way, or the length of a light-year.

In chip verification, there is also an astronomical number, which is the number of cycles needed to fully verify a CPU core. What exactly does this astronomical number represent?

If we use the most advanced software simulation technology available today to fully verify a CPU core, it would take at least 15,000 years. Using the most advanced hardware emulation technology can slightly reduce this time to 30 years. But we all know that developing a chip cannot wait 15,000 years, nor can it wait 30 years.

So, what is the essence of the problem? We have actually been researching this over the past few years. We found that in chip verification, there exists a so-called 'impossible triangle', namely the high performance of chip verification, good debugging capability, and low cost; these three factors crucial to chip verification cannot be satisfied simultaneously. For current mainstream research or methods, at most, two out of the three can be achieved, and this is the fundamental reason for the low efficiency of chip verification.

Someone Must Do Something Different

Completed: 60%//////////

Due to these reasons, chip verification has not seen significant development over the past period.

In chip companies, chip engineers may spend more time writing test cases and running regression verification. Essentially, it's dirty and tiring work. The same goes for academia; very few scholars are devoted to chip verification research, especially compared to current hot fields like artificial intelligence, research related to chip verification is very scarce.

So, an academic leader once told me that in the same amount of time, they could publish three or even more papers in the field of artificial intelligence, but in chip verification, they might not even publish one.

Unfortunately, what they said is true.

However, someone must do something different.

Therefore, over the past few years, I have led a team in conducting research related to chip verification and have built an agile verification research system from scratch. The core of this research system is a verification platform called ENCORE, which is based on a special chip—the Field-Programmable Gate Array (FPGA). ENCORE can significantly improve verification efficiency while achieving good verification debuggability.

To build this agile verification research system, on one hand, we need to continuously optimize the efficiency of vulnerability mining, debugging, and repair at the algorithmic level; on the other hand, we also hope to build an end-to-end agile verification acceleration platform based on programmable logic chips (FPGAs). At the application level, we hope this platform can be suitable for both general-purpose processor verification, such as CPUs or GPUs, and specialized chip verification, such as the currently very popular AI accelerators.

Over the past period, we have done a lot of cutting-edge exploratory work in this field, including the aforementioned ENCORE and many new research projects. We have also published these research results at many internationally renowned academic conferences.

We are actually working on some interesting projects afterwards, but since these works have not been published yet, I won't show them to you one by one for now.

Letting More People Understand Chips

Completed: 80%//////////

However, during the research process, I gradually realized that these scientific or academic achievements are mainly for people within our small circle who only understand chip verification and related fields. So, how can we let more people see our work, understand our research, and even participate in our endeavors?

Naturally, I thought of chip science popularization, which also feels very interesting to me. I have been engaged in science popularization for four or five years, starting from text initially to later making videos on Bilibili. Chip science popularization has not only brought me many gains but also helped me meet many like-minded friends, as well as viewers who like and support me.

However, making chip science popularization videos is not a simple task, especially in today's era of short video proliferation. A fellow science popularization blogger and leader told me that in the same amount of time it takes me to produce one long, hardcore chip science popularization video, they could make 10 or even more short videos related to hot topics, and the traffic could be many times greater than mine.

Unfortunately, what they said is also true.

But based on this, I think there still needs to be people who persist in doing difficult things. I hope to combine chip science popularization and chip verification—two equally difficult but equally interesting things—and use video and text formats to show everyone what we have done, the papers we have published, and the open-source chip projects our entire large team is researching.

Besides chips, I will also share hardcore technologies like artificial intelligence and computers with everyone, as well as share my growth experiences, the books I have read, and the knowledge I have acquired. I know that I am not a genius myself, nor am I a so-called all-around expert or guru. I would rather be a 'guide' for everyone, sharing the path I have walked.

So, returning to the question I wanted to share with everyone today: chip research and chip science popularization, which one is more interesting? Of course, for me, both are equally interesting. The reason is simple: because they are equally difficult. At the same time, they both require me to persist very long-term and enduringly.

Many people say we need to do difficult and right things. But the problem actually is: how do you judge if something is right before you do it? If something is seen as sitting on a cold bench in others' eyes, or seen as doing dirty, tiring work, would you still persist in doing it?

Therefore, I prefer to do difficult and long-term things, such as academic research in chip verification, or making long hardcore chip science popularization videos. Because if something is difficult and requires long-term persistence, then it is probably right.

That's all I wanted to share with you today. I am Lao Shi, thank you, everyone!

This article comes from the WeChat public account: Gezhi Lundaotan , Author: Shi Kan, Original Title: 'How Difficult is Chip Making? A Division Error Costs 475 Million Dollars | Shi Kan'

Domande pertinenti

QWhat was the main point of the story about the Intel Pentium chip flaw mentioned in the article?

AThe story illustrated a critical design bug in the Pentium chip's floating-point division unit. A calculation that should have resulted in '0' instead produced '255.00000000'. This seemingly minor error forced Intel to spend $475 million on a global recall of the faulty chips in the 1990s, highlighting the high cost of failure in chip development.

QAccording to the article, why is chip development so difficult, especially compared to software development?

AChip development is exceptionally difficult because it requires 'first-time success'. Unlike software, which can be patched and updated after release, a physical chip cannot be easily modified once manufactured (or 'taped out'). The entire expensive process, from sand to finished silicon, costing potentially hundreds of millions, must be redone to fix design flaws.

QWhat percentage of chip projects achieve first-time success according to the survey data cited by the author?

AAccording to the survey data presented by the author, only 24% of chip projects achieve first-time success. This means approximately three-quarters (76%) of projects require at least one re-spin or re-fabrication due to various undetected design bugs, leading to significant extra time and cost.

QWhat is the 'impossible triangle' in chip verification, as explained in the article?

AIn chip verification, the 'impossible triangle' refers to the three crucial factors—high performance, good debuggability, and low cost. The article states that these three factors cannot be satisfied simultaneously with current mainstream methods. Engineers and researchers can only achieve a maximum of two out of these three, which fundamentally limits verification efficiency.

QWhat are the two 'hard but long-term' pursuits that the author, Shi Kan ('Lao Shi'), is committed to?

AThe author is committed to two challenging, long-term endeavors. First, he leads academic research in chip verification, specifically developing an agile verification framework called ENCORE based on FPGAs. Second, he creates hardcore, long-form chip and technology popular science content (like his Bilibili channel videos), aiming to make complex topics accessible to a wider audience beyond academic circles.

Letture associate

PANews Column Registration and Article Submission Guide

"PANews Column Registration and Submission Guide" provides instructions for users to register as columnists and publish articles on the PANews platform. Key application requirements are emphasized: content should focus on in-depth analysis within Crypto, Web3, blockchain, data, and viewpoints. Content primarily for brand/product introductions will not be approved, and heavily AI-generated content will be rejected. Promotional (PR/soft) content is directed to the business channel. **Registration Process:** * **Web:** Go to the official website footer, click "Apply for Column," and register with a phone number or email (login via verification code, no password). Fill in the column name, description, upload an avatar, and submit links to previously published work. * **Mobile:** Navigate to "My" -> "Contribute & Create" and complete the form. **Article Submission Tutorial:** 1. Log in to the PANews website. 2. Access the "Creator Center" from your personal homepage. 3. Use the editor to create and publish articles. **Video Upload:** The platform supports embedding videos from third-party sites (e.g., Bilibili). Copy the embed code from the source video, use the editor's "Insert/Edit media" button, paste the code under the "Embed" tab, and adjust the display size (recommended: width 100%, height 560px). **PANews Skills (AI Agent Tool):** PANews offers an official AI Agent skill set called PANews Skills, enabling AI tools to query platform content, track trends, and publish column articles directly. It includes three main skills: 1. `panews`: For tracking daily must-read lists, popular articles, and funding news. 2. `panews-creator`: For managing columns, publishing articles, and uploading images. 3. `panews-web-viewer`: For parsing PANews webpages into Markdown. These skills are compatible with various AI Agent tools (OpenClaw, Cursor, Claude Code, ChatGPT, Gemini, etc.). To use the `panews-creator` skill, users must obtain a specific authentication value from the PANews website after logging into their columnist account.

marsbit2 min fa

PANews Column Registration and Article Submission Guide

marsbit2 min fa

I Built Myself an Investment Workbench Using AI

For the past two weeks, I've been immersed in Vibe Coding—using AI to write code from natural language descriptions. This process has enabled me to quickly build functional tools that address long-standing personal ideas. Previously, I had many concepts but found execution too cumbersome. Key ideas included a unified dashboard for assets across US stocks, Crypto, HK stocks, and A-shares; a real-time alert system for price movements; an investment map visualizing sector relationships; and a tool to correlate prediction market bets with news and market data. Traditional development hurdles meant these often remained unrealized. Using AI (Codex, Claude Code, and DeepSeek API), I built four initial tools: 1. A **Cross-Market Asset Dashboard** showing total assets, daily P&L, and holdings by market, with added features for alerts and sector mapping. It's deployed locally for privacy. 2. A **Prediction Market (PM) Monitor** tracking bets on events (e.g., company valuations) and correlating probability shifts with news and market movements. I categorize bets by conviction to filter noise. 3. A **Simple Operations Backend** for managing my writing workflow (topics, progress, publishing). It's cloud-deployed for mobile access. 4. A **One-Click Formatting Tool** that automates converting drafts into various platform-specific formats, saving manual effort. While these tools are basic, they represent a significant shift: AI lowers the barrier to creating personalized systems. I believe individual investors can now feasibly build core systems for: * **Asset Observation** (tracking holdings and changes) * **Signal Monitoring** (watching for key market shifts) * **Sector Mapping** (understanding network relationships within a sector) * **Performance Review** (documenting rationale and outcomes) The power of Vibe Coding is its fast feedback loop. Ideas can be implemented, tested, and iterated on rapidly, turning "want-to-do" into "done." This marks the start of my new phase, where I'll share investment thoughts, tool tests, on-chain operations, and educational Web3 content.

marsbit18 min fa

I Built Myself an Investment Workbench Using AI

marsbit18 min fa

After Tokenization of Assets, How to Exit?

Title: How to Exit After Asset Tokenization? Author: Symbiotic Compiled by: Hu Tao, ChainCatcher Summary: Tokenization addresses how assets go on-chain but largely leaves the redemption question unresolved. While tokenized assets can settle instantly, the underlying redemption for assets like treasuries, private credit, or real estate can take from T+1 to 180 days. This gap hinders DeFi adoption of Real World Assets (RWAs). Three emerging models aim to provide instant exit liquidity, differing primarily in their capital structure and efficiency: 1. **Balance Sheet Model (e.g., Grove Basin):** A single entity (like Sky) provides immediate liquidity from its balance sheet, acting as a bridge during the settlement period. It offers simplicity and deep initial liquidity but is constrained by a single entity's capacity and risk appetite. 2. **Asset-Specific Vault Model (e.g., Upshift Clear):** Independent liquidity providers fund dedicated vaults for each supported asset, earning fees. It decentralizes capital sources but isolates liquidity and capital per asset, leading to potential fragmentation. 3. **Shared Liquidity Layer Model (e.g., Symbiotic Liquid Lane):** A shared capital pool supports multiple RWA types simultaneously. Funds remain productive between redemptions (e.g., earning yield in lending markets). Exits are settled via a competitive RFQ market. This model aims for higher capital efficiency, scalability across assets, and serves longer-duration assets like private credit. Key differentiators are: 1) Source of capital and risk bearer, 2) Redemption pricing mechanism, 3) Capital efficiency, 4) Scalability to new asset types, and 5) Composability. The shared liquidity layer model represents a move from piecemeal solutions toward scalable infrastructure, enabling T+0 exits by pooling capital, maintaining yield, and using competitive pricing, thus enhancing RWA utility in DeFi.

marsbit31 min fa

After Tokenization of Assets, How to Exit?

marsbit31 min fa

After Tokenizing Assets, How to Exit?

After tokenization, a key unresolved issue is providing holders with a reliable exit mechanism, as underlying asset settlement (taking days to months) lags far behind on-chain token settlement. Three primary models for instant liquidity have emerged, differing in their capital structure and efficiency: 1. **Balance Sheet Model (e.g., Grove Basin):** A single, well-capitalized entity (like Sky) provides immediate liquidity from its own reserves. This offers simplicity and deep initial liquidity but is constrained by that single balance sheet's capacity and risk appetite, limiting scalability. 2. **Dedicated Vault Model (e.g., Upshift Clear):** Independent liquidity providers (LPs) fund separate vaults for each supported asset. This decentralizes capital sources but isolates liquidity and capital, which becomes inefficient as the number of tokenized assets grows. 3. **Shared Liquidity Layer Model (Symbiotic Liquid Lane):** Independent capital providers fund shared vaults that can support multiple tokenized assets simultaneously. Capital remains productive between redemptions (e.g., earning yield in DeFi markets). Exits are settled via a competitive RFQ market where market makers bid. The article argues that the shared layer model offers superior capital efficiency and scalability. It transforms exit liquidity from an asset-specific patch into shared market infrastructure, allowing liquidity capacity to grow with overall market participation rather than being fragmented per asset. This is particularly valuable for longer-duration assets like private credit, where reliable T+0 exits can significantly enhance their utility in DeFi.

链捕手45 min fa

After Tokenizing Assets, How to Exit?

链捕手45 min fa

Trading

Spot
Futures

Articoli Popolari

Come comprare CHIP

Benvenuto in HTX.com! Abbiamo reso l'acquisto di USD.AI (CHIP) semplice e conveniente. Segui la nostra guida passo passo per intraprendere il tuo viaggio nel mondo delle criptovalute.Step 1: Crea il tuo Account HTXUsa la tua email o numero di telefono per registrarti il tuo account gratuito su HTX. Vivi un'esperienza facile e sblocca tutte le funzionalità,Crea il mio accountStep 2: Vai in Acquista crypto e seleziona il tuo metodo di pagamentoCarta di credito/debito: utilizza la tua Visa o Mastercard per acquistare immediatamente USD.AICHIP.Bilancio: Usa i fondi dal bilancio del tuo account HTX per fare trading senza problemi.Terze parti: abbiamo aggiunto metodi di pagamento molto utilizzati come Google Pay e Apple Pay per maggiore comodità.P2P: Fai trading direttamente con altri utenti HTX.Over-the-Counter (OTC): Offriamo servizi su misura e tassi di cambio competitivi per i trader.Step 3: Conserva USD.AI (CHIP)Dopo aver acquistato USD.AI (CHIP), conserva nel tuo account HTX. In alternativa, puoi inviare tramite trasferimento blockchain o scambiare per altre criptovalute.Step 4: Scambia USD.AI (CHIP)Scambia facilmente USD.AI (CHIP) nel mercato spot di HTX. Accedi al tuo account, seleziona la tua coppia di trading, esegui le tue operazioni e monitora in tempo reale. Offriamo un'esperienza user-friendly sia per chi ha appena iniziato che per i trader più esperti.

278 Totale visualizzazioniPubblicato il 2026.04.21Aggiornato il 2026.06.02

Come comprare CHIP

Discussioni

Benvenuto nella Community HTX. Qui puoi rimanere informato sugli ultimi sviluppi della piattaforma e accedere ad approfondimenti esperti sul mercato. Le opinioni degli utenti sul prezzo di CHIP CHIP sono presentate come di seguito.

活动图片